✨ About The Role
- The FPGA Verification Engineer will work closely with the design team to validate custom FPGA-based embedded systems.
- The role involves building a validation infrastructure to verify the behavior of custom IP from the unit level up to the system level.
- The engineer will develop and implement a thorough test methodology that ensures full coverage of FPGA IP functionality.
- Integration of RTL verification frameworks with system-level test frameworks is a key responsibility.
- Collaboration with FPGA/SW designers to understand testing needs for various platforms is essential for success in this role.
âš¡ Requirements
- The ideal candidate will have a bachelor's or master's degree in a relevant field such as Computer Science, Computer Engineering, Electrical Engineering, or Mechanical Engineering.
- A minimum of 4 years of industry experience in RTL verification is required, indicating a solid background in the field.
- Proficiency in Verilog/SystemVerilog is essential, showcasing the candidate's technical skills in hardware description languages.
- Familiarity with scripting languages such as TCL, Python, or Perl is important for developing verification environments.
- The candidate should be comfortable working in Unix environments, indicating a need for adaptability in different operating systems.